Equipment
Lab and Coral NameTRL / sts-CVD
ModelSTS/Multiplex PECVD
SpecialistDonal Jamieson    (Robert Bicchieri)
Physical Location4F Entry Diffusion
Classification
Process CategoryDeposition
SubcategoryPECVD
Material KeywordsSilicon, SiO2, SiNx, Dielectrics
Sample Size6" Wafers, 4" Wafers, Pieces
AlternativeICL / Oxford-100
Keywordssingle wafer, multiple pieces, load lock, top side of sample, conformal dep, vacuum, plasma, temperature
Description
The sts-CVD is a PECVD tool which deposits thin films such as oxide, nitride, Si carbide, a-Si and P-doped a-Si films. This tool is designated for RED processing and can be used both for the FEOL and BEOL. No photoresist is allowed in this tool. An etch-back recipe should be run after processing (this is not automatically done), to clean the chamber. This is especially important when relatively thick films are deposited (e.g. 1 um). This tool has capability to work from pieces to 6" wafers. Batch mode can deposit on two wafers sequentially.

Best forThin/Thick dielectric films
LimitationsSingle or dual-wafer batch mode, no casette operation
Characteristics/FOMPECVD, a-Si, SiO2, SiNx, SiOxNy, SiC
Caution withNo photo-resist is on the wafers/pieces, because it would burn in the heated chamber
Machine Charges (academic rate)7pu/wafer + 1pu/um
Documents

SOP
CVDSOP for the STS CVD
Process Matrix Details

Permitted
Been in the ALDSamples that have been in any of the ALD systems
,
Pyrex SubstratesPyrex substrates can be a concern due to high sodium content, which contaminates CMOS frontend tools
,
III-V SubstratesAny III-V substrates, e.g. GaAs, GaN, InP, and so on. Note though that many common III-V substrates will also carry the Au flag, but there are some GREEN III-V substrates.
,
Germanium on surfaceSamples with germanium on the surface (typically grown films)
,
Germanium buriedSamples with germanium buried below a different film
,
PiecesWafer pieces may not be handled by the equipment, and are harder to thoroughly clean - preventing them from running in certain tools.
,
Gold or RED color codeRED color code substrates. These are gold-contaminated or have been processed in gold contaminated tools. Gold and other metals can contaminate silicon devices (GREEN color code) and have to be separated.
(Adds),
Any exposure to CMOS metalIf the sample had ever seen a CMOS metal (or a tool that accepts CMOS metal), then some frontend tools could be contaminated by this.
(Adds),
CMOS metal on surfaceCMOS compatible metals exposed on the surface. These are Al,Ni,Pt,Ti,TiN. Other metals such as Au are *NOT* part of this.
,
CMOS metal buriedCMOS compatible metals covered entirely by a different material. These are Al,Ni,Pt,Ti,TiN. Other metals such as Au are *NOT* part of this.
,
Been in the STS DRIEThe DRIE etch leaves behind polymer residues on the sidewall ripples, which can be a contamination concern for some tools.
,
Been in the SEMA sample viewed in the SEM must have used the appropriate chuck to avoid cross-contamination
,
Been in the Concept1The Concep1 deposits dielectrics on GREEN wafers, however it also accepts metal and there can be cross-contamination for diffusion area
,
Has PolyimidePolyimide is a very chemically resistant polymer, and can tolerate higher temperatures but cannot be exposed to typical PECVD deposition temperatures or diffusion furnaces. Outgassing can be a concern.
,
Coming from KOHAfter a KOH etch, the samples must receive a special clean because the K ions are highly contaminating to CMOS frontend tools
,
Coming from CMPAfter a CMP, the samples must receive a special clean, because the slurry residues otherwise introduce contamination and particles.


Not Allowed
Ever been in EMLSamples from EML are never permitted to return to ICL or TRL
,
Has PhotoresistSamples with photoresist cannot be exposed to high temperatures, which is typical in deposition tools. Outgassing can be a concern.
,
Has Cured SU8Not fully cured SU8 residues can heavily contaminated plasma chambers or destroy other user's samples, but fully cured SU8 is permitted in certain tools.


For more details or help, please consult PTC matrix, email ptc@mtl.mit.edu, or ask the research specialist (Donal Jamieson)